Stability Factor | types of stability factor | what is stability factor mcq | bias stability of transistor

Stability Factor | types of stability factor | what is stability factor mcq | bias stability of transistor ? comparing fixed and collector to base bias which of the following statement is true ?
Stability of Quiescent Operating Point
Lat us assume that the transistor is replaced by an other transistor of same type. the B_DC of the two transistors of same type may not be same. therefore, if B_DC increases then for same I_B, output characteristic shifts upward. if B_DC decreases, the output characteristic shifts downeard. since, I_B is maintained constant therefore, the operating point shifts Q to Q₁ as shown in fig. 13. the new operating point may be completely unsatifactory.
maintain V_CE and I_C constant as B_DC changes.
A second cause for bias instability is a variation in temperature. the reverse saturation current changes with temperature. specifically,I_CO doubles for every 10⁰C rise in temperature. the collector current I_C causes the collector junction temperature to rise, which in turn increases I_CO. As a result of this growth I_CO, I_C will increase {B_DC I_B + (1 + B_DC) I_CO} and so on. it may be possible that this process goes on and the ratings of the transistor are exceeded. this increases in I_C changes the characteristic and hence, the operating point.
Stability Factor
The operating point can be made stable by keeping I_C and V_CE constant. there are two lechniques to make Q point stable

1. stabilization techniques
2. Compensation techniques

In first, resistor beasing circuits are used which allows I_B to vary so as to keep I_C relatively constant with variations in B_DC, I_CO and V_BE.
In second, temperature sensititive such as diodes, transistors are used which provide compensating voltage and current to maintain the operating point constant.
To compare different biasing circuits, stability factor S is defined as the rate of change of collector current with respect to the I_CO, keeping  B_DC and V_CE constant.
S = I_C / I_CO
If S is large, then circuit is thermally instable. S cannot be less than unity. the other stability factors are I_C / B_DC and I_C / V_BE. The bias circuit, which provide stability with I_CO, also shows stability even if B and V_BE change.
I_C = B_DCI_B + (I + B_DC) I_CO
Differentiating with respect to I_C^,
1 = B_DC I_B/I_C + (1 + B_DC) / S
S = 1 + B_DC/ I_B
1 – B_DC  / I_C
In fixed bias circuit, I_B and I_C are independent.
Therefore, I_B / I_C = 0 and S= 1 + B_DC. If B_DC = 100, S =101, wgich means I_C increases 101 times as fast as I_CO. Such as large change definitely operate the transistor in saturation.
Emitter Feedback Bias
Fig . 14 shows the emitter feedback bias circuit in this circuit, the voltage across resistor R_E is used to offset the changes in B_DC. if B_DC increases, the collector current increases. this increases the emitter voltage which decreases the voltage across base resistor and reduces base current. the redued base current resulys in less collector current, which partially offsets the original increase in B_DC . the feedback term is used because output current (I_C) produces a change in input current (I_E). R_E is common in input and output circuits.
In this case,
V_CC = I_BR_B + V_BE + I_ER_E
Since                I_E = I_C + I_B
I_B / I_C = R_E / R_B + R_E
Therefore,
S = 1 + B_DC << (1 + B_DC)
1 + B_DC (R_E / R_B + R_E)
In this case, S is less compared to fixed bias circuits. thus, the stability of the Qpoint is better.
I_E = I_C = V_CC – V_BE
R_E + R_B / B_DC
If     I_C is to made insensitive to B_DC then,
R_E >> R_B / B_DC
R_E cannot be made large enough to swamp out the effects of B_DC without saturating the transistor.
Collector Feedback Bias
In this case, the base resistor is retumed back to collector as shown in fig. 15. if temperature increases. B_DC increases. this produces more collector current. As I_C increases, collector-emitter voltage decreases. it means less voltage across R_B and causes a decrease in base current. this decreases I_C and compensating the effect of B_DC.
In this circuit, the voltade equqtion is given by
V_CC = (I_B + I_C) R_C + I_BR_B + V_BE
Circuit is stiff sensitive to change in B_DC. The advantage is that only two resistors are used. then.
I_B / I_C = – R_C / R_B + R_C
Therefore,
S =    1 + B_DC  < 1 + B_DC < 1 + B_DC
1 + R_CB_DC / R_B + R_C      1 + B  R_E / R_B
it is better as compare to fixed bias circuit.
Further,                    I_C = V_CCV_BE
R_C + R_B  / B_DC
Circuit is still sensitive to change in B_DC. The advantage is that only two resistors are used.
Voltage Divider Bias
If the load resistance R_C is very samll e.g., in a transformer coupled circuit, then there is no improvement in stabilization in the collector to base bias circuit over fixed bias circuit. A circuit which can be used even if there is no DC resistance in series with the collector, is the voltage devider bias or self bias.
The current in the resistance R_E in the emitter lead causes a voltage drop which in the direction to reverse bias the emitter junction. since, this jusction must be forward biased, the base voltage is obtained from the supply through R₁ , R₂ network. if R_B = R₁ || R₂ equivalent resistance is very – very small, then V_BE voltage is independent of I_CO and I_CO. For best stability, R₁ and R₂ must be kept small.
If I_C tends to increase, because of I_CO, then the current in R_C increases, hence base current is decreased because of more reverse biasing and it reduces I_C.
To analyze this circuit, the base circuit is replaced by its thevenin’s equivalent as shown in fig. 16. (a).
Thevenin’s voltage is
V = R₂ / R₁ + R₂ = V_CC
R_B = R₁R₂ / R₁ + R₂
R_B is the effective resistance seen back from the base terminal.
V = I_BR_B + V_BE + (I_B + I_C) R_E
If V_BE is considered to be independent of I_C then,
I_B / I_C = – R_E / R_B + R_E
S = 1 + B_DC
1 + B_DCR_E / R_B + R_E
If               R_{B /}R_C = 0, then  S = 1
If              R_B/R_C = _OO, then S = (1 + B_DC)
The smaller the value of R_B‘ the better is the stabilization but S cannot be reduced by unity.
Hence. I_C always increases more than I_CO. If R_B is reduced then current drawn from the supply increases, also if R_E is increased then to operate at same Q point, the magnitude of V_CC must be increased in both the cases the power loss increased and reduced h.
In order to avoid the loss of AC signal because of the feedback caused by R_E, this resistance is often by passed by a large capacitance (> 10 mF) so that its reactance at the frequency under consideration is very small.
Emitter Bias
Fig. 17 shows the emitter bias circuit.the circuit gets this name because the negetive supply V_EE is used to forward bias the emitter junction through resistor R_E. V_CC still reverse biases collector junction. this also gives the same stability as voltage divider circuit but it is used only if split supply is available.
In this circuit, the voltage equation is given by
I_BR_B + V_BE + I_ER_E = V_EE
Therefore,      I_B = I_C / B_DC = I_E / B_DC
I_E = V_EE – V_BE
R_E + R_B / B_DC
If I_C or I_E is to be independent of B then,
R_E >> R_B / B_DC
Then,    I_E = V_EE– V_BE / R_E
This shows that emitter is virtually at ground potential.
V_CE = V_CC – I_CR_C
Normally, R_B is selected less than 0.01 B_DC R_E.
Example 5. Determine the Q point for CE amplifier given in figure. if R₁ = 1.5 k and R_S = 7 k. A transistor is used with B = 180, R_E = 100 and  R_C = R_Ioad = 1 k. Also determine the P_{out (AC)} and the DC power delivered to the circuit by the source.
Sol. We first obtained the thevenin’s equivaent.
V_BB = R₁ / R₁ + R₂ = V_CC
= 1500 / 1500 + 7000 x 5 = 0.882 v
and           R_B = R₁R₂ / R₁ + R₂ = 1.24 K
I_CQ = V_BB – V_BE / R_B/ B + R_E = 0.882 – 0.7 / 1240/180 + 100
Note that this is not a desirable Q point location. since V_BB is very close to V_BE. Variation in V_BE therefore, significantly change I_C. We find R_AC = R_C||R_load = 500 and R_DC = R_C + R_E = 1.1K. The value of V_CE representing the quiescent value associated with I_CQ is found as follows:
V_CE,_Q = V_CC – V_CQR_DC
= 5 – (1. 70×10 ^-3) (1.1 x 10^-3) = 3.13 V
Then,       V_CC = V_CE,_Q + I_CQ R_AC
= 3.13 + (1.7 x 10^-3) (500) = 3.98 V
Since, the Qpoint is on the lower half of the AC load line, the maximum possible symmrtrical output voltage swing is
2 (I_CQ – 0) (R_C||R_load) = 2 (1.70×10^-3) (500) = 1.70V_P-P
The AC power output can be calculated as
P_{out (AC)} = 1/2 I²_load = 1/2 (1.7×10^-3x1000/2000)²x1000
=0.361mW
The power drawn from the DC source is given by
P_{vcc (DC)} = I_CQV_CQ + V²_CC/R₁ +R₂ = 11.4 mW
The power loss in the transistor is given by
P_transistor = v_ce, _Q I_CQ = 3.13×1.70
= 5.32mW
The Q point in this example is not in the middle of the load line so that output swing is not as great as possible. however, if the input signal is small and maximum output is not required a small I_C can be used to reduce the power dissipated in the circuit.
Moving Ground Around
Ground is a reference point that can be moved around, e.g., consider a collector feedback bias circuit. the various stages of moving ground are shown in fig. 18.
Biasing a p-n-p Transistor
The biasing of p-n-p transistor is done similar to n-p-n transistor except that suppiy is of opposite polarity the various biasing circuits of p-n-p transmitter are shown in fig. 19.
Example 6. For the circuit shown in figure, calculate I_C and V_CE.
sol. Voltage across 1k resistor = 1/3 x30 =10 v
Therefore,           I_C ~ I_E = 10 – 0.7 / 2 = 9.3 /2 = 4.65 mA
Therefore,             V_C = 465×3
= 13.95 v
AC Load Line
Consider a DC equivalent circuit given in fig. 20 (a). Assume I_C = I_C (approximately), the output circuit voltage equation can be written as
V_CE = V_CC – I_C (R_C + R_E)
and            I_C = -V_CE / R_C + R_E + V_CC / R_C + R_E
V_CE = 0, I_C = V_CC / R_C + R_E
and       I_C = 0, V_CE = V_CC
The slop of the DC load line is  -1 /R_C + R_E            When
considering the AC equivalent circuit, the output impedance becomes R_C||R_L which is less than (R_C + R_E).
In the absence of AC signal, this load line passes through Q point. therefore, AC load line is a line of slope {-1/(R_C||R_L)} passing through Q point. through Q point. therefore. the output voltage fluctuations will be now corresponding to AC load line as shown in fig. 20 (b). under this condition, Q point is not in the maddle of load line therefore, Q point is sescted slightly upwaed, means slightly shifted to saturation side.
Voltage Gain
To find the voltage gain, consider an unloaded CE amplifier. the AC equivalent circuit is shown in fig. 21. the transistor can be replaced by its collector equivalent mosel i.e., a current source and emitter diode which offers AC resistance R’_E.
The input voltage appears directly across the emitter diode.
Therefore, emitter current I_E = V_in/R’_E
Since, collector current approximately equals emitter current I_C = I_E and V_out = – I_ER_C (the minus sign is used here to indicate phase inversion)
Further V_out = – (V_inR_C) /R’_E
Therefore, voltage gain A = V_out / V_in = – R_C/R’_E
The AC source driving an amplifier has to supply alternating current to the amplifier. the input impedance of an amplifier determines how much current the amplifier takes from the AC source.
In a normal frequency range of an amplifier, where all capacitors look like AC shorts and  other reactances are negligible, the AC input impedance is defined as
Z = V_in/ I_in
Where,V_in and I_in are peak-to-peak values or rms values. the impedance looking directly into the base is symbolized Z_{in (base)} and is given by
Z_{in (base)} = V_in/ I_B
Since,           V_in = I_ER’_E
>> B_IBR’_E
Z_{in (base)} = BR’E
From the AC equivalent circuit, the input impedance Z_in is the parallel combination of R₁ and R₂ and BR’_E
i.e.,                      Z_in = R₁||R₂||BR’_E
The thevenin voltage appearing at the output is
V_out = AV_in
The thevenin impedance is the parallel combination of R_C and the internal impedance of the current source. the collector current source is an ideal source therefore, it has an infinite internal impedance.
Z_out = R_C
The simplified AC equivalent circuit is shown in fig. 22.
Example 7. Select R₁ and R₂ for maximum output voltage swing in the circuit shown in figure.
Sol. We first determine I_CQ for the circuit.
R_AC = R_C ||R_load = 500
R_DC = R_E + R_C = 1100
I_CQ = V_CC / R_AC + R_DC = 5/500+1100
= 3.13 mA
For maximum  swing,                     V’_CC = 2V_CE.Q
The quiescent value for V_CE is given by
V_CE.Q  = (3.13) (500) = 1.56 V
The intersection of the AC load line on the V_CE axis is V’_CC = 3.13 V from the manufacturer’s specifiction B for the 2N3904 is 180. R_B is set equal to 0.1 B R_E. So,
R_B = 0.1 (180) (100) = 1.8 KW
V_BB = (3.13×10^-3) (1.1×100) + 0.7 = 1.044 V
Since, we know V_BB and R_B, we find R₁ and R₂
R₁ = R_B / 1-V_BB/V_CC = 1800/ 1.044 = 2.28 K
R₂ = R_BV_CC/ V_BB = 1800×5 /1.044 = 8.62 k
The maximum output voltage swing ignoring the non-linearity at saturetion and cut-off would be maximum collector current swing = 2 I_CQ (R_C||R_lout)
= 2 (3.13) (500)
= 3.13 V
The load lines are shown on the characteristics of the figure.
The maximum power dissipated by the transistor is calculated to assure that it does not exceed the specifications. the maximum average power dissipated in the transistor is
P_(transistor) = V_CE.QI_CQ = (1.56) (3.13)
= 4.87 mW
This is well within the 350 mW maximum given on the specification sheet. the maximum conversion efficiency is
n = p_{out (AC)} / P_{VCC (DC)} = (3.13×10^-3/2)² x 1000/2×100 / 5×3.13×10^-3+5_/10.9×10^-3
= 6.84%
The Swamped Amplifier
The AC resistance of the emitter diode R’_E equals 25 mV/I_E and depends on the temperature. any change in R’_E will change the voltage gain in CE amplifier. in some applications, a change in voltage is acceptable. but in many applications we need a stable voltage gain is required.
To make it stable, a resistance R_E is inserted in series with the emitter and therefore, emitter is longer AC grounded fig. 23.
Because of this the AC emitter current flows through R_E and produces an AC voltage at the emitter, if R_E is much greater than R’_E almost all of the AC input signals appear at the emitter and the emitter is bootstrapped to the base for AC as well as  for DC.
In this case, the collector current is given by
I_C = V_in / R’_E + R_E
and           V_out = – I_C R_C
Therefore,              A = V_out / V_in = – I_CR_C / I_C (R’_E+R_E)
= -R_C/ R’_E + R_E
Now, R’_E has a less effect on voltage gain, swamping means R_E>> R’_E if swamping is less, voltage gain varies with temperature. if swamping is heavy, then gain reduces very much.